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NXP Semiconductors /LPC43xx /ADCHS /CLR_EN0

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Interpret as CLR_EN0

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https://regviz.com/r/NXP Semiconductors/LPC43xx/ADCHS/CLR_EN0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CEN00RESERVED

Description

Interrupt 0 clear mask

Fields

CEN0

Interrupt clear enable
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data